1,同步整流buck converter,vin12V, Vout 1v, when there is load transient procedure, such as load increase, or load decrease, in which case the over shoot is worse?why?
我真沒注意到哪個的overshoot大.
2,同步整流buck的low side MOSFET 為什么要并聯一個肖特級diode?
為什么可以達到提高效率的目的?
我知道為什么,確不知道原因
3,在死區時間,上下兩個MOSFET是什么狀態?low side mosfet 的body diode和并聯的 shottky diode 是什么狀態?
我知道有些chip提供這個死區時間的調整,但具體什么狀態包括diode的狀態確實是no idea
4,low side mosfet body diode and shottky diode 誰先導通,然后最后誰承擔電流?為什么?
沒答出為什么、:(
5,選擇crossover frequency 時有什么極限限制?
我就知道應該選在10%-20% switching frequency, 不知道這限制是什么及其理論.通常這種buck run at 1MHZ 以上
沒作過同步整流的buck covnerter, 回答得一塌糊涂,慘.
工作難找呀.
謝謝你指導
昨天電話面試,有幾個問題請教各位,謝謝
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@jackyluo
1.decrease2.yingweimosfetdebinnianerjiguanyajiangda,fangxianghuifushijianda3off, on4.xiaotieji,yajiangwenti5.香容定理
thanks man, but..but.. your post is really hard to read.
1. I also think the over shoot in load decrease is worse.
the reason might be that vout=1, vin=12, that means the duty is very small. so when the load increase ,the duty cycle won't decrease furth. so the overshoot is not that bad. while in load decrease, the duty cycle can increas lot,making bigger overshoot.sigh...I thought through it after the interview, too late...too bad...
2. I know the reason why the efficiency can be increased. but I sitll have no idea why the body conducts first.
3, I reply as both off, body diode on, I am afraid I guess the correct answer.
4, same as 2
5, could you tell me little bit detail.what is the practical limit for the selection of cross over frequency.
one more question I remembered.
Q. the benifits of high frequency.
I answered with small inductor and capacitors
Q more
I answered: increase the transient response
Q more
I don't know another benifit of the high f, I just know the price could be more switching loss and EMI problem? what the other benifits on high frequency???thanks
too bad for my first phone interview, I wish I could get a on-site, which is on Fremont, SF. now I lost it嚴重郁悶ing
1. I also think the over shoot in load decrease is worse.
the reason might be that vout=1, vin=12, that means the duty is very small. so when the load increase ,the duty cycle won't decrease furth. so the overshoot is not that bad. while in load decrease, the duty cycle can increas lot,making bigger overshoot.sigh...I thought through it after the interview, too late...too bad...
2. I know the reason why the efficiency can be increased. but I sitll have no idea why the body conducts first.
3, I reply as both off, body diode on, I am afraid I guess the correct answer.
4, same as 2
5, could you tell me little bit detail.what is the practical limit for the selection of cross over frequency.
one more question I remembered.
Q. the benifits of high frequency.
I answered with small inductor and capacitors
Q more
I answered: increase the transient response
Q more
I don't know another benifit of the high f, I just know the price could be more switching loss and EMI problem? what the other benifits on high frequency???thanks
too bad for my first phone interview, I wish I could get a on-site, which is on Fremont, SF. now I lost it嚴重郁悶ing
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@gunking
thanksman,but..but..yourpostisreallyhardtoread.1.Ialsothinktheovershootinloaddecreaseisworse.thereasonmightbethatvout=1,vin=12,thatmeansthedutyisverysmall.sowhentheloadincrease,thedutycyclewon'tdecreasefurth.sotheovershootisnotthatbad.whileinloaddecrease,thedutycyclecanincreaslot,makingbiggerovershoot.sigh...Ithoughtthroughitaftertheinterview,toolate...toobad...2.Iknowthereasonwhytheefficiencycanbeincreased.butIsitllhavenoideawhythebodyconductsfirst.3,Ireplyasbothoff,bodydiodeon,IamafraidIguessthecorrectanswer.4,sameas25,couldyoutellmelittlebitdetail.whatisthepracticallimitfortheselectionofcrossoverfrequency.onemorequestionIremembered.Q.thebenifitsofhighfrequency.IansweredwithsmallinductorandcapacitorsQ moreIanswered:increasethetransientresponseQ moreIdon'tknowanotherbenifitofthehighf,IjustknowthepricecouldbemoreswitchinglossandEMIproblem?whattheotherbenifitsonhighfrequency???thankstoobadformyfirstphoneinterview,IwishIcouldgetaon-site,whichisonFremont,SF.nowIlostit嚴重郁悶ing
1.其實在調節速度等一定的前提下,就跟負載阻尼系數有很大關系,重載駐尼系數大
5.開關頻率決定了電容與電感的體積,而cross frequency 決定了快速性overshoot,高頻噪聲衰減,開關頻率高則cross frequency 也可以做的高
根據采樣定律:cross frequency 要小于0.2的開關頻率
5.開關頻率決定了電容與電感的體積,而cross frequency 決定了快速性overshoot,高頻噪聲衰減,開關頻率高則cross frequency 也可以做的高
根據采樣定律:cross frequency 要小于0.2的開關頻率
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@gunking
謝謝你的回帖.那公司不錯,在灣區,可惜我面試搞砸了,咳,準備工作方向不對,他一上來就直接問很基本的關于同步整流buckconverter的問題.我準備的問題卻是其它公司同類產品的指標和技術.問題是很基本,可惜我沒有翻翻自己準備的葵花寶典.很多問題知道個大概,不知道詳細的原理.可惜可惜
嗨,這位兄臺的英語不錯呀,
我可以請問一下,你說你應聘搞砸的那個公司是什么公司嗎,具體名稱,放心我不是去應聘,我只是想尋找是否有合作的機會(我是業務,我司是做過壓過流保護元件),在此小弟像各位大哥請教,誰知道廣東這邊有那些大的工廠需要這些電子元件(事成后必重謝)
我可以請問一下,你說你應聘搞砸的那個公司是什么公司嗎,具體名稱,放心我不是去應聘,我只是想尋找是否有合作的機會(我是業務,我司是做過壓過流保護元件),在此小弟像各位大哥請教,誰知道廣東這邊有那些大的工廠需要這些電子元件(事成后必重謝)
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@jackyluo
1.其實在調節速度等一定的前提下,就跟負載阻尼系數有很大關系,重載駐尼系數大5.開關頻率決定了電容與電感的體積,而crossfrequency決定了快速性overshoot,高頻噪聲衰減,開關頻率高則crossfrequency也可以做的高根據采樣定律:crossfrequency要小于0.2的開關頻率
I think should be that phase margin determines the overshoot while the crossover frequency (bandwidth) determines the the response speed...
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這些都是些基本且重要的問題,對DC/DC來說.
我來回答一下:
1)減低負載時的過沖大,負載突然減少時占空比要能迅速減小才能有效抑制過沖,但此電源占空比非常小,缺少迅速減少的空間,此時電感的儲能使電容電壓升的很高.但加載時由于有足夠的占空比,就不存在此問題.
2)并聯肖特級為了提高效率,因為在死區時間時MOS的體二極管要導通,但體二極管的壓降較大,用肖特級壓降低,可提高效率.
3)死區時間,上下MOS是關斷狀態(死區的含義),shottky diode導通.
4)shottky diode. 我認為可能你聽錯了這題,應該問:low side mos and shottky diode誰先導通,然后誰承擔電流.應該是shottky diode先導通,然后MOS承擔電流.
5)有好幾個因素:斜坡匹配(電壓電流方式都有),運放增益帶寬積,香農定理的帶寬遠在此以上,是極限的極限,也就是說不用考慮.
我來回答一下:
1)減低負載時的過沖大,負載突然減少時占空比要能迅速減小才能有效抑制過沖,但此電源占空比非常小,缺少迅速減少的空間,此時電感的儲能使電容電壓升的很高.但加載時由于有足夠的占空比,就不存在此問題.
2)并聯肖特級為了提高效率,因為在死區時間時MOS的體二極管要導通,但體二極管的壓降較大,用肖特級壓降低,可提高效率.
3)死區時間,上下MOS是關斷狀態(死區的含義),shottky diode導通.
4)shottky diode. 我認為可能你聽錯了這題,應該問:low side mos and shottky diode誰先導通,然后誰承擔電流.應該是shottky diode先導通,然后MOS承擔電流.
5)有好幾個因素:斜坡匹配(電壓電流方式都有),運放增益帶寬積,香農定理的帶寬遠在此以上,是極限的極限,也就是說不用考慮.
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@cmg
這些都是些基本且重要的問題,對DC/DC來說.我來回答一下:1)減低負載時的過沖大,負載突然減少時占空比要能迅速減小才能有效抑制過沖,但此電源占空比非常小,缺少迅速減少的空間,此時電感的儲能使電容電壓升的很高.但加載時由于有足夠的占空比,就不存在此問題.2)并聯肖特級為了提高效率,因為在死區時間時MOS的體二極管要導通,但體二極管的壓降較大,用肖特級壓降低,可提高效率.3)死區時間,上下MOS是關斷狀態(死區的含義),shottkydiode導通.4)shottkydiode.我認為可能你聽錯了這題,應該問:lowsidemosandshottkydiode誰先導通,然后誰承擔電流.應該是shottkydiode先導通,然后MOS承擔電流.5)有好幾個因素:斜坡匹配(電壓電流方式都有),運放增益帶寬積,香農定理的帶寬遠在此以上,是極限的極限,也就是說不用考慮.
其實:具體是加載還是減載時過沖大應根據工作的占空比和電路的可以達到的最大占空比有關.如在占空比未飽和下跟交越f和輸出電容和esr有關
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@cmg
這些都是些基本且重要的問題,對DC/DC來說.我來回答一下:1)減低負載時的過沖大,負載突然減少時占空比要能迅速減小才能有效抑制過沖,但此電源占空比非常小,缺少迅速減少的空間,此時電感的儲能使電容電壓升的很高.但加載時由于有足夠的占空比,就不存在此問題.2)并聯肖特級為了提高效率,因為在死區時間時MOS的體二極管要導通,但體二極管的壓降較大,用肖特級壓降低,可提高效率.3)死區時間,上下MOS是關斷狀態(死區的含義),shottkydiode導通.4)shottkydiode.我認為可能你聽錯了這題,應該問:lowsidemosandshottkydiode誰先導通,然后誰承擔電流.應該是shottkydiode先導通,然后MOS承擔電流.5)有好幾個因素:斜坡匹配(電壓電流方式都有),運放增益帶寬積,香農定理的帶寬遠在此以上,是極限的極限,也就是說不用考慮.
hi,CMG,
thank you for your reply, yes, I agreed with you, these questions are quite foundamental. I did't make a good reparation for it. if I had some previouse experience and I could clam down, and think a little bit, these questions are not difficult. I thought and knew most of the answers just after the interview. anyway, I do have some experience to deal with techinique interview, hope I were lucky enough to get another interview soon and I could muc better. thanks again,
thank you for your reply, yes, I agreed with you, these questions are quite foundamental. I did't make a good reparation for it. if I had some previouse experience and I could clam down, and think a little bit, these questions are not difficult. I thought and knew most of the answers just after the interview. anyway, I do have some experience to deal with techinique interview, hope I were lucky enough to get another interview soon and I could muc better. thanks again,
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@jackyluo
其實:具體是加載還是減載時過沖大應根據工作的占空比和電路的可以達到的最大占空比有關.如在占空比未飽和下跟交越f和輸出電容和esr有關
過沖是與占空比有關,所以面試題目特別指出是16V to 1V,在這種情況下占空比是很小的,所以是減載上沖大.下面有實例.
其實對一般DC/DC,在占空比未飽和時,實際上加減載過沖是差不多的,如果不考慮雜散電感的影響(其脈沖非常窄,如果示波器帶寬不夠就看不到,如果這個也認為是過沖,則加減載是完全一樣的).如果非要深究,應該是加載過沖大,為什么呢?因為動態負載瞬間,反饋電路是來不及動作的,這時過沖是由電容容量和ESR決定的,對加減載來說,ESR的影響是一樣的,但容量的影響是不一樣的,加載:1/2*C{(V+&)平方-V平方}; 減載:1/2*C{V平方-(V-#)平方};V為正常輸出電壓,加減載瞬間電量變化是一樣的,所以&<#,既加載過沖大. 這是對你第二個問題的直接答案,“有關”是個模糊的概念.
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其實對一般DC/DC,在占空比未飽和時,實際上加減載過沖是差不多的,如果不考慮雜散電感的影響(其脈沖非常窄,如果示波器帶寬不夠就看不到,如果這個也認為是過沖,則加減載是完全一樣的).如果非要深究,應該是加載過沖大,為什么呢?因為動態負載瞬間,反饋電路是來不及動作的,這時過沖是由電容容量和ESR決定的,對加減載來說,ESR的影響是一樣的,但容量的影響是不一樣的,加載:1/2*C{(V+&)平方-V平方}; 減載:1/2*C{V平方-(V-#)平方};V為正常輸出電壓,加減載瞬間電量變化是一樣的,所以&<#,既加載過沖大. 這是對你第二個問題的直接答案,“有關”是個模糊的概念.

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@cmg
過沖是與占空比有關,所以面試題目特別指出是16Vto1V,在這種情況下占空比是很小的,所以是減載上沖大.下面有實例. 其實對一般DC/DC,在占空比未飽和時,實際上加減載過沖是差不多的,如果不考慮雜散電感的影響(其脈沖非常窄,如果示波器帶寬不夠就看不到,如果這個也認為是過沖,則加減載是完全一樣的).如果非要深究,應該是加載過沖大,為什么呢?因為動態負載瞬間,反饋電路是來不及動作的,這時過沖是由電容容量和ESR決定的,對加減載來說,ESR的影響是一樣的,但容量的影響是不一樣的,加載:1/2*C{(V+&)平方-V平方};減載:1/2*C{V平方-(V-#)平方};V為正常輸出電壓,加減載瞬間電量變化是一樣的,所以&
這個問題分析起來有很多現象,具體可以在ieee上關于vrm的文章中有介紹
cmg問你個問題:在dcm pfc中在電感和整流橋之間加個pi濾波,那個pi的電感感直高(800uH),他不參與能量的傳送嗎,如不,那么大的值對工作有影響不
cmg問你個問題:在dcm pfc中在電感和整流橋之間加個pi濾波,那個pi的電感感直高(800uH),他不參與能量的傳送嗎,如不,那么大的值對工作有影響不
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@gunking
hi,CMG,thankyouforyourreply,yes,Iagreedwithyou,thesequestionsarequitefoundamental.Idid'tmakeagoodreparationforit.ifIhadsomepreviouseexperienceandIcouldclamdown,andthinkalittlebit,thesequestionsarenotdifficult.Ithoughtandknewmostoftheanswersjustaftertheinterview.anyway,Idohavesomeexperiencetodealwithtechiniqueinterview,hopeIwereluckyenoughtogetanotherinterviewsoonandIcouldmucbetter.thanksagain,
弱弱問個問題:交叉 frequensy在開關電源中的定義與用處?什麼是香儂定理?
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@lucky_xhq
我有不同意見,我認為dutycycle不會隨著負載的變化而有大的變化,只要看看它的基本公式就知道了,即使有變化也是為了彌補電流增大帶來的效率損失,而不是為了提供負載電流,(它與dutycycle是沒有關系的.)所以我覺得應該是一樣過沖應該一樣,歡迎提供不同意見!另外想問個問題,宵特基二極管的反向恢復時間小,增加效率,但是有一樣不明白,就是到底什么是反向恢復時間,還有它為什么降低效率?謝謝!
根據我看一些IC的data sheet, 在high input low output的應用中,確實是加載時overshoot大.我覺得是因為此時的duty實際很低.沒有什么減少的空間,而瞬間增多的空間大.
二極管由導通到截至,正向電流減小到零后有一個很短的反向電流時間trr,在回到零(forward leakage>0).trr就是反向恢復時間.時間越長,帶來越大loss
二極管由導通到截至,正向電流減小到零后有一個很短的反向電流時間trr,在回到零(forward leakage>0).trr就是反向恢復時間.時間越長,帶來越大loss
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